This invention relates in general to differentiator circuits and, more particularly, to a differentiator using a signal processing filter.
Differentiator circuits are commonly used, for example, in computer disk drive applications to detect the peak of an analog signal received from the read/write head. It is important to identify the time of occurrence of the peak of the analog signal to maximize the signal-to-noise ratio for the resulting digital logic signal. The peak of the analog signal corresponds to a zero slope, or equivalently the point of zero rate of signal change per unit time. Thus, by taking the derivative the analog signal from the read/write head of the disk drive and detecting the zero crossing of the differentiated signal, the peak of the analog signal may be determined.
In disk drive applications, the differentiator is typically a two-pole filter stage placed in parallel with the final two-pole stage of a Bessel-type or elliptic-type main signal processing filter. The differentiating filter stage has poles with the same natural frequency and damping factor as the final two-pole stage of the Bessel filter and includes a zero in the numerator of the corresponding transfer function for providing the differentiation operation.
One principal problem with the conventional differentiator is the excessive area consumed by the duplicate filter components in the parallel differentiating stage. The pole-generating capacitors tend to be physically very large. Another difficulty is the effort in matching the natural frequency and damping factor between the final filter stage and the differentiator stage.
Hence, what is needed is an improved differentiator which eliminates the additional two-pole filter stage in parallel with the primary filter to reduce the space allocation in an integrated circuit.